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With a product portfolio 10 times greater and broader than any other, is the world’s leader in silicon timing and is in a unique position to address the needs of virtually any application. With the industry’s largest market share, IDT is the only one-stop-shop for timing, offering products from full-featured system solutions to simple clock building-block devices. Factory-programmable options and clock solution customization capabilities address unique customer requirements, while the lowest jitter and lowest power features set IDT apart from the competition. Products are accompanied by a world-class support team driven by service and responsiveness goals.

To learn more, simply scroll down or use the Product Blocks to jump ahead. Clock Distribution IDT’s family of zero delay buffers provides low jitter and low input to output delay for high-speed clock distribution applications.

The zero delay feature means that the rising edge of the input clock aligns with the rising edges of both output clocks, giving the appearance of no delay through the device. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback path eliminates the delay through other devices and can be on-chip or external. On-chip feedback is obtained from the CLKOUT pad. Some parts have the option to add multiplier or divider paths to the outputs. IDT’s zero delay buffer family includes products supporting supply voltages from 2.5 V to 5 V, output frequencies 5 to 210 MHz, and 1 to 9 outputs.

Typical output types supported are CMOS and TTL. Zero Delay buffers; which are ideal for synchronizing outputs in a large variety of systems, from personal computers to data communications to graphics/video. IDT’s family of fan-out buffers provides multiple low skew copies of the reference input.

The large fan-out from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. IDT’s fan-out buffer family includes products supporting supply voltages from 1.2 V up to 5 V, output frequencies from 0 to 200 MHz, and 1 to 16 outputs.

Typical output types supported are CMOS, TTL, and LVCMOS. Fan-out buffers are ideal for clock and signal distribution in a large variety of systems, from personal computers to consumer electronics or industrial systems. Clock Generation IDT announced the expansion of the VersaClock® 5 family of programmable clock generators with new devices that simplify the creation of PCI Express® clocks while providing the flexible outputs for which VersaClock 5 is known. The new members of the high-performance VersaClock 5 family feature dedicated low-power HCSL (LP-HCSL) outputs that reduce board space and bill of materials (BOM) by providing an integrated clock generation and distribution solution for PCIe designs. The 5P49V5907 and 5P49V5908 devices have three outputs that can generate any frequency up to 350 MHz in configurable output types – LVPECL, LVDS, HCSL or LVCMOS, and additional four or eight LP-HCSL outputs specifically for PCIe clocking.

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They possess the same best-in-class jitter and power performance as the original 5P49V5901 device. VersaClock 5 programmable timing devices feature excellent jitter performance at half the power of competing devices. With RMS phase jitter of less than 0.7 picoseconds over the full 12 kHz to 20 MHz integration range, the products are ideal for such markets as high-end consumer, networking, computing, industrial and communications. Features • 3 programmable outputs with any frequency up to 350 MHz • LVPECL, LVDS, HCSL, or Dual LVCMOS outputs • Additional 4/8 copies of low-power HCSL (LP-HCSL) outputs to accommodate PCI Express timing needs • High Performance: – Less than 700 fsec RMS phase jitter – Meets the requirements of PCI ExpressGen 1/2/3 as well as 1G/10G Ethernet and other high-performance protocols • Low Power: – 35 mA core current consumption – Low-power HCSL outputs for PCI Express clocks Applications • Multi-function printers • Servers • Set-top boxes • Solid-state drives . The IDT5P49V5901 is low-power programmable clock generator with best-in-class jitter performance and design flexibility with universal outputs capable of generating any output frequency. IDT5P49V5901 is intended for high-performance consumer, networking, industrial, computing, and data-communications applications.

Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I²C interface. This is IDT's fifth generation of programmable clock technology (VersaClock 5).The frequencies are generated from a single reference clock or crystal input. A glitchless manual switchover function allows one of the redundant clock inputs to be selected during normal operation. Two select pins allow up to four different configurations to be programmed and accessible using processor GPIOs or bootstrapping. The different selections may be used for different operating modes (full function, partial function, partial power-down), regional standards (US, Japan, Europe) or system production margin testing.